《学术前沿讲座系列 第192期》Mehdi Saligane 助理教授：在人工智能时代重新思考芯片设计

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• 题目: 在人工智能时代重新思考芯片设计
• 主讲人：Mehdi Saligane 助理教授 @ 布朗大学
• 时间：2026年6月1日 14:30-15:30
• 地点：Room 104, SUSTech Business School Building

主讲人简介

Mehdi Saligane is an Assistant Professor of Electrical and Computer Engineering at Brown University, where he leads research at the intersection of integrated circuits, AI for chip design, and hardware for emerging AI and sensing applications. His work aims to rethink how chips are designed and deployed, spanning analog and mixed-signal design automation, energy-efficient architectures, biosensing systems, and custom hardware for lightweight language models.

He is a founding member of the OpenROAD and OpenFASOC projects and has played a leading role in advancing open, accessible, and automated chip design. Before joining Brown in 2025, he was a Research Faculty member at the University of Michigan and joined Google Research as a Visiting Faculty Member in 2024. Earlier in his career, he worked at STMicroelectronics on adaptive ultra-low-power digital design and held visiting research positions at the University of Michigan and UC San Diego.

Dr. Saligane has received the 2023 Google Cloud Research Innovators Award and the 2021 Google Research Faculty Award. He has also held several leadership roles in the open-source silicon community, including within CHIPS Alliance and the IEEE Solid-State Circuits Society (SSCS), where he currently chairs the Open-Source Ecosystem Technical Committee (TC-OSE). He co-founded and organizes the SSCS Chipathon Design Contest and the SSCS Code-a-Chip Notebook Competition, helping grow a global community around open-source chip design, education, and innovation.

讲座简介

AI is changing not only the applications we build, but also the way we design the chips that power them. This talk explores how we can rethink chip design in the age of AI from two complementary directions: using AI to automate and improve chip design, and building specialized chips that make AI dramatically more efficient.

On the design side, we present Agentic-RL gLayout, a reinforcement-learning framework for analog layout generation that replaces manual heuristics with goal-driven planning and self-correction. Built on open-source tools such as OpenROAD, gLayout, and OpenFASOC, it enables cleaner, more compact, and rule-compliant layouts with far less manual effort. On the architecture side, we present a hardware-software co-design stack for efficient edge AI, reducing latency and energy in LLM inference. By co-optimizing models, precision, and accelerator design, this approach supports fast, privacy-preserving inference under tight power constraints.

Taken together, these efforts illustrate a broader shift toward open, AI-enabled chip design flows and domain-specific AI hardware. The result is a faster, more automated, and more accessible path to silicon in the age of AI.

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